Algorithmic Energy Saving for Parallel Cholesky, LU, and QR Factorizations

Slack is pervasive in runs of high performance applications, in the presence of various performance boosting solutions. The presence of slack provides ample opportunities for achieving energy efficiency for high performance computing nowadays. Regardless of communication slack, classic energy saving approaches for saving energy during the slack otherwise include race-to-halt and CP-aware slack reclamation, which reply on power scaling techniques to adjust processor power states judiciously during the slack. Existing efforts demonstrate CP-aware slack reclamation is superior to race-to-halt in energy saving capability. In this paper, we formally model our observation that the energy saving capability gap between the two approaches is significantly narrowed down on today’s processors, given the fact that state-of-the-art CMOS technologies allow insignificant variation of supply voltage as operating frequency of a processor scales. We also provide experimental evaluation for validation on a large-scale power-aware cluster.